Hello, please see the following gnutls issue https://gitlab.com/gnutls/gnutls/issues/941.
Nettle today is working on aarch64, aarch64_be and arm, but broken on armeb.
You can test it using the following way: 1. Enable CONFIG_X86_X32=y in kernel. 2. Install qemu-user with required arch and start qemu-binfmt service.
Run commands: docker run -it puchuu/test_aarch64-unknown-linux-gnu bash env-update && source /etc/profile MAKEOPTS='-j16' FEATURES='test' emerge -v1 dev-libs/nettle
Unfortunately I can't provide complete armeb image, because its build depends on working nettle. I can provide only armeb results:
FAIL: chacha FAIL: memxor FAIL: ccm FAIL: pss FAIL: rsa-pss-sign-tr
5 of 98 tests failed
I am launching "./testsuite/chacha-test" directly, result: Error, length 7, expected:
76b8e0ada0f13d Got:
ade0a9f13d9076 qemu: uncaught target signal 6 (Aborted) - core dumped
So it looks like armeb is completely broken today.
Hi Андрей,
On Tue, Feb 18, 2020 at 02:28:50AM +0300, Андрей Аладьев wrote:
Hello, please see the following gnutls issue https://gitlab.com/gnutls/gnutls/issues/941.
Nettle today is working on aarch64, aarch64_be and arm, but broken on armeb.
Nice to see that someone other than me is doing armeb. :)
FAIL: chacha FAIL: memxor FAIL: ccm FAIL: pss FAIL: rsa-pss-sign-tr
The asm for arm certainly needed adjustment to work on armeb. See https://lists.lysator.liu.se/pipermail/nettle-bugs/2018/007280.html.
So it looks like armeb is completely broken today.
I have had this running on actual armeb hardware with nettle-3.4 and 3.5 for a couple of years and there are no issues with the testsuite or in production.
configure: summary of build options:
Version: nettle 3.5.1 Host type: armv7veb-unknown-linux-gnueabihf ABI: standard Assembly files: arm/v6 arm Install prefix: /usr Library directory: /usr/lib Compiler: armv7veb-unknown-linux-gnueabihf-gcc Static libraries: no Shared libraries: yes Public key crypto: yes Using mini-gmp: no Documentation: no
Linux b 5.5.2-gentoo-r1 #1 SMP Wed Feb 5 22:52:04 CET 2020 armv7b ARMv7 Processor rev 4 (v7b) Allwinner sun7i (A20) Family GNU/Linux
LD_LIBRARY_PATH=../.lib PATH="../.lib:$PATH" DYLD_LIBRARY_PATH=../.lib \ srcdir="/var/tmp/portage/dev-libs/nettle-3.5.1/work/nettle-3.5.1/testsuite" \ EMULATOR="" NM="armv7veb-unknown-linux-gnueabihf-nm" EXEEXT="" \ /var/tmp/portage/dev-libs/nettle-3.5.1/work/nettle-3.5.1/run-tests [...] PASS: aes [...] PASS: chacha [...] PASS: memxor [...] PASS: ccm [...] PASS: pss PASS: rsa-sign-tr PASS: pss-mgf1 PASS: rsa-pss-sign-tr [...] PASS: nettle-pbkdf2 armv7veb-unknown-linux-gnueabihf-nm: '../libnettle.a': No such file armv7veb-unknown-linux-gnueabihf-nm: '../libnettle.a': No such file PASS: symbols PASS: dlopen =================== All 99 tests passed ===================
@Niels: Sorry for falling off the face of the earth after the CI extravaganza. I hadn't even noticed that armeb made it into nettle-3.5. A working version just fell out of the package manager. Let me know if there are any outstanding issues regarding armeb and I'll look into them.
BTW: libressl recently added arm optimized asm and now poses the same problem for armeb.
Michael Weiser michael.weiser@gmx.de writes:
@Niels: Sorry for falling off the face of the earth after the CI extravaganza.
I'm afraid I don't remember the conclusions of our earlier discussions on CI.
I hadn't even noticed that armeb made it into nettle-3.5. A working version just fell out of the package manager.
Nice that it's working out of the box.
Let me know if there are any outstanding issues regarding armeb and I'll look into them.
To keep it in working shape, it would help a lot with additional tests in .gitlab-ci. I'm not really familiar with the cross setup used for arm, mips, and aarch64, Nikos helped with all that. But maybe armeb can be added in the same way?
I'm not aware of any issues, but on the other hand, I don't do any testing on armeb.
Regards, /Niels
Hello Niels,
On Tue, Feb 18, 2020 at 12:25:05PM +0100, Niels Möller wrote:
Let me know if there are any outstanding issues regarding armeb and I'll look into them.
To keep it in working shape, it would help a lot with additional tests in .gitlab-ci. I'm not really familiar with the cross setup used for arm, mips, and aarch64, Nikos helped with all that. But maybe armeb can be added in the same way?
That's exactly the rabbithole I went down and got lost in the last time: armeb is so niche that I'm not aware of any ready-to-install mainstream distribution for it. I am running Gentoo but that's not easy to maintain in a CI setting. I got a Debian-based qemu-user-binfmt_misc-based image working but that was very brittle as well because in the end it also needed to bootstrap the necessary components from source. So as it stands I cannot offer any improved CI for armeb that's maintainable with reasonable effort.
On the other hand: The armeb asm changes (for the most part) are so symmetric that any breakage would likely affect both armeb and armel.
Michael Weiser michael.weiser@gmx.de writes:
That's exactly the rabbithole I went down and got lost in the last time: armeb is so niche that I'm not aware of any ready-to-install mainstream distribution for it. I am running Gentoo but that's not easy to maintain in a CI setting. I got a Debian-based qemu-user-binfmt_misc-based image working but that was very brittle as well because in the end it also needed to bootstrap the necessary components from source.
I think there's been some effort to make debian easier to bootstrap for new architectures, but I don't know current state. Gnu guix people are also taking bootstrap very seriously.
So as it stands I cannot offer any improved CI for armeb that's maintainable with reasonable effort.
Then you (or other volunteers with interest in armeb) needs to do manual tests of Nettle from time to time, to keep it in working shape.
On the other hand: The armeb asm changes (for the most part) are so symmetric that any breakage would likely affect both armeb and armel.
There's been very few changes to the arm files since you contributed the armeb fixes (seems to be two years ago). But whenever there's some new code or larger rewrites there, it's likely that armeb will be broken in the process. Testing, be that ci or more manual, is essential.
Regards, /Niels
Hi Niels,
On Tue, Feb 18, 2020 at 09:45:01PM +0100, Niels Möller wrote:
That's exactly the rabbithole I went down and got lost in the last time: armeb is so niche that I'm not aware of any ready-to-install mainstream distribution for it. I am running Gentoo but that's not easy to maintain in a CI setting. I got a Debian-based qemu-user-binfmt_misc-based image working but that was very brittle as well because in the end it also needed to bootstrap the necessary components from source.
I think there's been some effort to make debian easier to bootstrap for new architectures, but I don't know current state. Gnu guix people are also taking bootstrap very seriously.
I had been working with rebootstrap. But that's not really meant to be able to reliably bootstrap from source at any given point in time but instead to show up bootstrapping problems as a CI measure for the Debian distribution iteself. That means that it breaks on an almost daily basis and an armeb image built with it will need considerable attention to build again after a couple of weeks or months.
So as it stands I cannot offer any improved CI for armeb that's maintainable with reasonable effort.
Then you (or other volunteers with interest in armeb) needs to do manual tests of Nettle from time to time, to keep it in working shape.
I will again look into some sort of CI for armeb.
Hello,
вт, 18 февр. 2020 г. в 13:30, Michael Weiser michael.weiser@gmx.de:
On Tue, Feb 18, 2020 at 02:28:50AM +0300, Андрей Аладьев wrote:
Hello, please see the following gnutls issue https://gitlab.com/gnutls/gnutls/issues/941.
Nettle today is working on aarch64, aarch64_be and arm, but broken on armeb.
Nice to see that someone other than me is doing armeb. :)
The asm for arm certainly needed adjustment to work on armeb. See https://lists.lysator.liu.se/pipermail/nettle-bugs/2018/007280.html.
What is the target hardware for armeb? I have tried building Nettle for armv5teb (thinking about NSLU2) and got failures because of `rev` instruction usage (present only on ARMv6/v7).
Andrew, if you are testing it with qemu, there well might be emulation deficiencies.
Hi Dmitry,
On Fri, Feb 21, 2020 at 07:02:54PM +0300, Dmitry Baryshkov wrote:
The asm for arm certainly needed adjustment to work on armeb. See https://lists.lysator.liu.se/pipermail/nettle-bugs/2018/007280.html.
What is the target hardware for armeb?
I am *using* it on Cubieboard 2's which are armv7. I don't think there's eveer been an actual hardware support statement.
I have tried building Nettle for armv5teb (thinking about NSLU2) and got failures because of `rev` instruction usage (present only on ARMv6/v7).
Huh, right. Most of the revs are in the v6 and neon subdirectories which should be fine because they are only activated for v6+. So we'd need to eliminate the revs in arm/memxor.asm and arm/memxor3.asm to support armv5teb.
Andrew, if you are testing it with qemu, there well might be emulation deficiencies.
I could dust off the old binfmt_misc setup for armv6veb and give that a whirl if it's of any help. I'm quite certain I initially worked around the asm problems on armeb by disabling asm when cross- and binfmt_misc-qemu-natively-compiling the userland for my Cubies. So I have likely never run the asm under qemu-user nor qemu-system.
Michael Weiser michael.weiser@gmx.de writes:
I am *using* it on Cubieboard 2's which are armv7. I don't think there's eveer been an actual hardware support statement.
Question is, what devices are out where, there armv5 support would be useful?
I have tried building Nettle for armv5teb (thinking about NSLU2) and got failures because of `rev` instruction usage (present only on ARMv6/v7).
Lookingup NSLU2 on wikipedia, it seems it features a "Intel XScale cpu" featuring an "ARMv5TE ISA without the floating point instructions." I take it this can be run in BE mode?
Huh, right. Most of the revs are in the v6 and neon subdirectories which should be fine because they are only activated for v6+. So we'd need to eliminate the revs in arm/memxor.asm and arm/memxor3.asm to support armv5teb.
Options are:
1. Do nothing, let armbe assembly require armv6, and recommend --disable-assembly for armv5be.
2. Eliminate use of rev in the armbe code.
3. Somehow arrange in configure so that the memxor files in particular aren't used when targetting armv5be. If you want to test the effects before hacking configure.ac, I think it should be as easy as removing the memxor*.asm symlinks after running configure.
I could dust off the old binfmt_misc setup for armv6veb and give that a whirl if it's of any help. I'm quite certain I initially worked around the asm problems on armeb by disabling asm when cross- and binfmt_misc-qemu-natively-compiling the userland for my Cubies. So I have likely never run the asm under qemu-user nor qemu-system.
Is there some problem with configuring qemu to emulate armv6? I think that's what is used when testing non-BE ARM, but I'm not 100% sure about that.
Regards, /Niels
Hi Niels,
On Sat, Feb 22, 2020 at 07:58:10AM +0100, Niels Möller wrote:
I am *using* it on Cubieboard 2's which are armv7. I don't think there's eveer been an actual hardware support statement.
Question is, what devices are out where, there armv5 support would be useful?
Well, arm devices are quite long-lived. I myself had my Marvel Kirkwood based NASes (which were armv5 but never ran BE) running way longer than I would have kept a similar x86 system around. These were 300Mhz and 128MiB of RAM, so totally underpowered, but they did their job. But with the current hype about aarch64 I'd expect the armv5 installation base to be shrinking.
I have tried building Nettle for armv5teb (thinking about NSLU2) and got failures because of `rev` instruction usage (present only on ARMv6/v7).
Lookingup NSLU2 on wikipedia, it seems it features a "Intel XScale cpu" featuring an "ARMv5TE ISA without the floating point instructions." I take it this can be run in BE mode?
The Intel XScale and IXP4xx are BE by default, IIRC. For them it's even a bit of a hike to run them LE since all their companion controllers and firmware blobs are BE as well.
Huh, right. Most of the revs are in the v6 and neon subdirectories which should be fine because they are only activated for v6+. So we'd need to eliminate the revs in arm/memxor.asm and arm/memxor3.asm to support armv5teb.
Options are:
- Do nothing, let armbe assembly require armv6, and recommend --disable-assembly for armv5be.
asm was broken for *any* armeb platform before the changes. Now it's working fine for armv6+, but, ...
- Eliminate use of rev in the armbe code.
... I've been looking at the revs and they now strike me as taking the easy way out anyway. They work around the implicit LE order in which some remaining bytes from a buffer are saved byte-wise. This should be doable without the revs by making the store work in BE fashion in BE mode. I plan to look into this but would certainly appreciate any help Dmitry and Андрей might be able to give here since it's not as if I've been doing nothing but arm asm the last couple of years - rather the opposite.
- Somehow arrange in configure so that the memxor files in particular aren't used when targetting armv5be. If you want to test the effects before hacking configure.ac, I think it should be as easy as removing the memxor*.asm symlinks after running configure.
Nah, we can do better than that. :)
I could dust off the old binfmt_misc setup for armv6veb and give that a
That'd be armv7veb, BTW.
whirl if it's of any help. I'm quite certain I initially worked around the asm problems on armeb by disabling asm when cross- and binfmt_misc-qemu-natively-compiling the userland for my Cubies. So I have likely never run the asm under qemu-user nor qemu-system.
Is there some problem with configuring qemu to emulate armv6? I think that's what is used when testing non-BE ARM, but I'm not 100% sure about that.
No, qemu-armeb should be able to do armv5eb and armv6eb just fine. It's just that I have experience and existing configs for this armv7veb setup since that's what I'm running on my cubies. Once I've sorted that, I should be able to use it to compile to armv5 and armv6 to see what breaks at the compilation stage already. I could also run these armv5 and armv6 binaries through qemu-armeb to see what breaks at runtime. I should also be able to produce similar setups for armv5 and armv6 to uncover any remaining incompatibilities which are somehow masked on the more capable armv7veb setup.
As a ramble, since I wrote it up before re-reading and -interpreting your question: That's exactly what I mean with "cross- and binfmt_misc-qemu-natively-compiling" setup: With Gentoo I can quite easily create a system-integrated cross-compiler toolchain for armeb and the package manager can use it to cross-compile a rootfs containing a native armeb toolchain, nettle and all its dependencies. This can be taken just as far as cross-compiling nettle and then running the testsuite under qemu-armeb, the user emulation mode where qemu-armeb acts as interpreter for the foreign binary executable format via binfmt_misc and emulates the Linux syscalls for the userland programs. It can also go as far as chrooting into the rootfs with qemu-armb executing a whole armeb userland via binfmt_misc and then using the native toolchain installed therein to compile everything including nettle natively (from its point of view).
The latter is what current arm CI is doing IIRC but based on Debian's native support for arm combined with its capability of installing multiple architectures into a single rootfs at once (multillib).
Something similar to the Gentoo-approach should be doable with buildroot which I am currently looking into for armeb CI purposes: buildroot could generate a cross-compiler toolchain and rootfs for nettle CI. This would be much more maintainable than Debian's rebootstrap since armeb is an actual supported target platform of buildroot. A minor problem with it (and likely similar projects such as openwrt) is that they're focused on cross-compilation for an embedded system. So AFAI{K,CT,CS} they are not able to produce a native toolchain for the target platform which rules out qemu variant 2 above.
If anyone knows any other project which produces an armeb binary distribution or specializes in bootstrapping cross-compilers and rootfses that support armeb natively, I'd very much appreciate the pointer.
Hi all,
On Sat, Feb 22, 2020 at 07:43:18PM +0100, Michael Weiser wrote:
- Eliminate use of rev in the armbe code.
... I've been looking at the revs and they now strike me as taking the easy way out anyway. They work around the implicit LE order in which
Updated code is now at https://git.lysator.liu.se/michaelweiser/nettle/-/tree/arm-memxor-generic and inline below for comments.
It now compiles and runs the testsuite fine on my native armv7veb when configurd with:
CFLAGS="-march=armv6" LDFLAGS="-march=armv6" \ ../configure --disable-documentation \ --host=armv6b-unknown-linux-gnueabihf [...] Assembly files: arm/neon arm/v6 arm
and:
CFLAGS="-march=armv5te" LDFLAGS="-march=armv5te -Wl,--be8" \ ../configure --disable-documentation \ --host=armv5b-unknown-linux-gnueabihf [...] Assembly files: arm
LDFLAGS "-Wl,--be8" is necessary for armv5teb to work on my system because it is BE8 which the gcc linker driver defaults to when run with -march=armv6 but not for armv5 which causes the resuling binaries to be BE32 and segfault or bus error in ld-linux.so.3 on startup. For a (likely wrong) explanation of BE8 vs. BE32 see https://lists.lysator.liu.se/pipermail/nettle-bugs/2018/007059.html.
A quick check can be done with file:
$ echo "int main(void) {}" > t.c $ gcc -march=armv5te -o t t.c $ ./t Segmentation fault $ file t t: ELF 32-bit MSB shared object, ARM, EABI5 version 1 (SYSV), dynamically linked, interpreter /lib/ld-linux-armhf.so.3, for GNU/Linux 3.2.0, not stripped $ gcc -march=armv5te -Wl,--be8 -o t t.c $ ./t $ file t t: ELF 32-bit MSB shared object, ARM, EABI5 BE8 version 1 (SYSV), dynamically linked, interpreter /lib/ld-linux-armhf.so.3, for GNU/Linux 3.2.0, not stripped
The qemu environment is churning along in compilation currently.
Previous assembler error for reference:
$ make -j4 [...] /usr/bin/m4 ../asm.m4 machine.m4 config.m4 memxor.asm >memxor.s /usr/bin/m4 ../asm.m4 machine.m4 config.m4 memxor3.asm >memxor3.s gcc -I. -DHAVE_CONFIG_H -march=armv5te -ggdb3 -Wall -W -Wmissing-prototypes -Wmissing-declarations -Wstrict-prototypes -Wpointer-arith -Wbad-function-cast -Wnested-externs -fpic -MT memxor.o -MD -MP -MF memxor.o.d -c memxor.s gcc -I. -DHAVE_CONFIG_H -march=armv5te -ggdb3 -Wall -W -Wmissing-prototypes -Wmissing-declarations -Wstrict-prototypes -Wpointer-arith -Wbad-function-cast -Wnested-externs -fpic -MT memxor3.o -MD -MP -MF memxor3.o.d -c memxor3.s memxor.s: memxor3.s: Assembler messages: memxor3.s:146: Error: selected processor does not support `rev r4,r4' in ARM mode Assembler messages: memxor3.s:256: Error: selected processor does not support `rev r4,r4' in ARM mode memxor.s:126: Error: selected processor does not support `rev r3,r3' in ARM mode
If I remember correctly, ARMv5 be was BE-32
I will check with fresh Yocto build later or tomorrow.
Hi Dmitry,
On Sun, Feb 23, 2020 at 07:08:54PM +0300, Dmitry Baryshkov wrote:
If I remember correctly, ARMv5 be was BE-32
Yep. So is the buildroot output I get for arm926 armeb. I just need the BE8 workaround on my BE8 armv7veb system to test the armv5 compilate.
On Sun, Feb 23, 2020 at 07:09:43PM +0300, Dmitry Baryshkov wrote:
I will check with fresh Yocto build later or tomorrow.
Thanks!
Could Yocto be used for CI then? Do they do any kind of binary releases for armeb? How long and voluminous is a build of an armeb system with and without a native toolchain?
I've been offline, skiiing, for a week, and I haven't yet caught up we email. http://www.lysator.liu.se/~nisse/misc/s%C3%A5nfj%C3%A4llet.jpg
Michael Weiser michael.weiser@gmx.de writes:
Hi Niels,
On Sat, Feb 22, 2020 at 07:58:10AM +0100, Niels Möller wrote:
Lookingup NSLU2 on wikipedia, it seems it features a "Intel XScale cpu" featuring an "ARMv5TE ISA without the floating point instructions." I take it this can be run in BE mode?
The Intel XScale and IXP4xx are BE by default, IIRC. For them it's even a bit of a hike to run them LE since all their companion controllers and firmware blobs are BE as well.
Ok, so than ARM BE may be more relevant for these older chips than for newer ones, which are almost always run in LE mode?
- Eliminate use of rev in the armbe code.
... I've been looking at the revs and they now strike me as taking the easy way out anyway. They work around the implicit LE order in which some remaining bytes from a buffer are saved byte-wise. This should be doable without the revs by making the store work in BE fashion in BE mode. I plan to look into this but would certainly appreciate any help Dmitry and Андрей might be able to give here since it's not as if I've been doing nothing but arm asm the last couple of years - rather the opposite.
I've only had a quick look at the patch later in the thread, but I agree that if we have a loop to store a byte at a time anyway, it should be straight forward to "just" reverse the shifting direction depending on byte order.
- Somehow arrange in configure so that the memxor files in particular aren't used when targetting armv5be. If you want to test the effects before hacking configure.ac, I think it should be as easy as removing the memxor*.asm symlinks after running configure.
Nah, we can do better than that. :)
But relatedly, it looks like arm/v6/sha1-compress.asm and arm/v6/sha256-compress.asm need ARMv6 only on little-endian hosts. So it might be worthwhile to try to use these files on armv5be? I don't see an obvious great way to set it up though.
One way might be to add a arm/be/sha1-compress.asm file which simply includes the v6 file, and then add arm/be to the asm_path where appropriate.
Regards, /Niels
Hello,
пн, 2 мар. 2020 г. в 21:44, Niels Möller nisse@lysator.liu.se:
I've been offline, skiiing, for a week, and I haven't yet caught up we email. http://www.lysator.liu.se/~nisse/misc/s%C3%A5nfj%C3%A4llet.jpg
Michael Weiser michael.weiser@gmx.de writes:
Hi Niels,
On Sat, Feb 22, 2020 at 07:58:10AM +0100, Niels Möller wrote:
Lookingup NSLU2 on wikipedia, it seems it features a "Intel XScale cpu" featuring an "ARMv5TE ISA without the floating point instructions." I take it this can be run in BE mode?
The Intel XScale and IXP4xx are BE by default, IIRC. For them it's even a bit of a hike to run them LE since all their companion controllers and firmware blobs are BE as well.
Ok, so than ARM BE may be more relevant for these older chips than for newer ones, which are almost always run in LE mode?
It has become mostly irrelevant after authors of SlugOS have invented a way to run LE binaries on NSLU2. Working in embedded hardware area I haven't seen an armeb project for ages.
- Eliminate use of rev in the armbe code.
... I've been looking at the revs and they now strike me as taking the easy way out anyway. They work around the implicit LE order in which some remaining bytes from a buffer are saved byte-wise. This should be doable without the revs by making the store work in BE fashion in BE mode. I plan to look into this but would certainly appreciate any help Dmitry and Андрей might be able to give here since it's not as if I've been doing nothing but arm asm the last couple of years - rather the opposite.
I've only had a quick look at the patch later in the thread, but I agree that if we have a loop to store a byte at a time anyway, it should be straight forward to "just" reverse the shifting direction depending on byte order.
- Somehow arrange in configure so that the memxor files in particular aren't used when targetting armv5be. If you want to test the effects before hacking configure.ac, I think it should be as easy as removing the memxor*.asm symlinks after running configure.
Nah, we can do better than that. :)
But relatedly, it looks like arm/v6/sha1-compress.asm and arm/v6/sha256-compress.asm need ARMv6 only on little-endian hosts. So it might be worthwhile to try to use these files on armv5be? I don't see an obvious great way to set it up though.
One way might be to add a arm/be/sha1-compress.asm file which simply includes the v6 file, and then add arm/be to the asm_path where appropriate.
I will take a look on fixing the code for armv5. Replacing rev with bit fiddling should be easy.
Андрей Аладьев aladjev.andrew@gmail.com writes:
Hello, please see the following gnutls issue https://gitlab.com/gnutls/gnutls/issues/941.
Nettle today is working on aarch64, aarch64_be and arm, but broken on armeb.
As Michael Weiser said, he contributed changes to arm assembly a while ago, to support armeb. I can't say why that fails in your setting. Double check that big-endian is detected correctly by configure.
Also try to configure nettle --without-assembler, if that also fails, then it maybe something else in the environment that is broken.
Regards, /Niels
nettle-bugs@lists.lysator.liu.se