Do what? Solder on more memory? The memory controller is integrated in the SH4 and can handle 64MB of SDRAM per bank. The current memory is located in bank 3, but bank 2 can also be used for SDRAM (currently unused, so you'd have to solder the chip select line directly to the CPU, probably).
/ Marcus Comstedt (ACROSS) (Hail Ilpalazzo!)
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2004-01-17 17:43: Subject: file limits
It would be a lot of work, but it looks like someone is preparing for a PPC port by separating CPU- and OS-specific parts in diffrent directories in the next version. To really get what I want I would probably have to apply magic to a DC, solder on at least some extra memmory, after writing the SH3->Valgrind-RISC compiler.
Did anyone already do something like that? I can't remember hearing anything about the specs for the DC memory controller.
/ Peter Bortas